The microelectronic industry has a very short development cycle time. At this frenetic pace there is a strong temptation to take a “build and test” approach. This typically takes the form of a designed experiment with multiple design, material, and process settings. All of these test legs are then tested through conventional reliability tests. Should any of the experiment legs pass the reliability test then the new process or material is accepted. This method works well for establishing process parameters when the variable space is limited and reasonably well understood. That said, the method often fails when the converse is true. In those cases where it does succeed it is difficult to typically extrapolate toward future developments since the DOE is not based on an understanding of fundamental material properties.
BUMP PULL/SHEAR TECHNIQUES
Ball-shear testing is widely used in semiconductor assembly facilities to control ball-bonding production e.g. solder balls and wire bond balls. Shear stress is independent of the bonding area and has been recognized as a better indicator of bonding interface quality than shear force.
The integration of highly fragile low-K Inner Layer Dielectric (ILD) materials is critical to the reduction of signal propagation delays, which stem from continued geometric scaling of integrated circuits. As a result, the silicon backend (passivation layer, low-K ILD, silicon oxide layers) is prone to early failures if the applied thermomechanical stresses exceed the effective strength of the stack up. The Coefficient of Thermal Expansion (CTE) mismatch between silicon and the package substrate, along with the high stiffness of lead-free (Pbfree) interconnects, are the primary source of thermomechanical stresses. The problem is further exacerbated by reliability tests, such as the Highly Accelerated Stress Test (HAST) or temperature cycle, which are necessary to ascertain the life of these ILDs under "real life" conditions.
Commercially available bond strength testers are capable of conducting shear and tensile tests of wafer-level bumps. Bump shear tests are carried out using a 1-mil wide (25.4um) stylus. Bump pull tests are conducted using a 100um tweezer jaw with a 1Kg range pull cartridge. In both cases, the peak force to failure is reported. Results of strength measurements are also coupled with failure analysis methods such as Focused Ion Beam (FIB) for sample preparation, with subsequent Scanning Electron Microscopy (SEM) and Energy Dispersive X-ray (EDX) analysis in order to validate resulting failure mechanisms.
The experimental procedure involves clamping the die through the use of a suitable sample stage and selection of appropriate tool settings such as test speed, stylus height for bump shear, and tweezer grip pressure for bump pull. The bump pull and shear techniques may be applied to testing either on singulated silicon die samples post FAB wafer assembly processes, or on dies that were first assembled on a package substrate and subsequently removed by heating the package. The latter process is used to understand the impact of assembly-related parameters on silicon backend strength.
BUMP PULL/SHEAR TECHNIQUES
Ball-shear testing is widely used in semiconductor assembly facilities to control ball-bonding production e.g. solder balls and wire bond balls. Shear stress is independent of the bonding area and has been recognized as a better indicator of bonding interface quality than shear force.
The integration of highly fragile low-K Inner Layer Dielectric (ILD) materials is critical to the reduction of signal propagation delays, which stem from continued geometric scaling of integrated circuits. As a result, the silicon backend (passivation layer, low-K ILD, silicon oxide layers) is prone to early failures if the applied thermomechanical stresses exceed the effective strength of the stack up. The Coefficient of Thermal Expansion (CTE) mismatch between silicon and the package substrate, along with the high stiffness of lead-free (Pbfree) interconnects, are the primary source of thermomechanical stresses. The problem is further exacerbated by reliability tests, such as the Highly Accelerated Stress Test (HAST) or temperature cycle, which are necessary to ascertain the life of these ILDs under "real life" conditions.
Commercially available bond strength testers are capable of conducting shear and tensile tests of wafer-level bumps. Bump shear tests are carried out using a 1-mil wide (25.4um) stylus. Bump pull tests are conducted using a 100um tweezer jaw with a 1Kg range pull cartridge. In both cases, the peak force to failure is reported. Results of strength measurements are also coupled with failure analysis methods such as Focused Ion Beam (FIB) for sample preparation, with subsequent Scanning Electron Microscopy (SEM) and Energy Dispersive X-ray (EDX) analysis in order to validate resulting failure mechanisms.
The experimental procedure involves clamping the die through the use of a suitable sample stage and selection of appropriate tool settings such as test speed, stylus height for bump shear, and tweezer grip pressure for bump pull. The bump pull and shear techniques may be applied to testing either on singulated silicon die samples post FAB wafer assembly processes, or on dies that were first assembled on a package substrate and subsequently removed by heating the package. The latter process is used to understand the impact of assembly-related parameters on silicon backend strength. 
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