Monday, April 11, 2011

Package Design

Pin grid arrays
Larger chips, with more leads, have outgrown the DIP configuration. The pin grid array is a package designed for larger chips. It features a pre made “sandwich” with the outer leads coming out of the bottom of the package in the form of pins. The chip is attached in a cavity that is formed in either the top or bottom of the body, usually using bump/flip-chip technology. Connections to the chip cover the entire chip area, unlike most chips with connections restricted to bonding pads around the periphery of the chip. Ceramic PGAs are hermetically sealed with a soldered metal lid.


Ball grid arrays (BGAs) or flip-chip ball grid arrays (FCBGAs)
BGAs have the same body shape as PGAs. Instead of pins on the package bottom, there is a series of solder bumps (balls) used to connect the package to the PCB. This is essentially the same technology used to connect die to packages. The effect is to lower the package profile and weight as well as providing higher pin counts by using the whole chip surface for bonding pads. Balls (or bumps) also bring the aspect absorbing stresses created from the thermal expansion differences between the package and the PCB.

A simple Ball Grid Array

Quad packages
While pin grid array packs are a convenient design for larger chips, their ceramic construction is expensive compared to molded epoxy packages. This consideration led to the development of the “quad” package. A quad (short for quadrant) pack is constructed by the epoxy molded technique but has leads coming out of all four sides of the package.
Thin packages
New products such as smart cards require thin packages. Several techniques are used to make thinner packages. They are called flat packs (FPs), thin small outline packages (TSOPs), small outline IC (SOIC), or ultra-thin packages (UTPs). Flat packs are constructed by the same techniques used to form DIP packages. These packages are designed with flatter height profiles and have their leads bent out to the side of the package. Ultra-thin packages have total body heights in the 1 mm range. There are also quad flat packs (QFPs).

Chip-scale packages

In the world of ICs, the perfect package is no package. It is recognized that any package brings with it electrical resistance, weight, the opportunity to degrade the circuit performance, and cost. Overall, the smaller the package, the cheaper the cost of packaging and the benefit of higher densities. Chip-scale packages meet this need. They are simply packages with dimensions within 1.2 times the die size. The challenges are to provide adequate mechanical and environmental protection for easy connection to printed circuit boards. General design approaches favor flip-chip technology with ball grid arrays and blob top protection. The march to smaller packages and more reliable electrical connections has lead to the micro-ball grid array, or μBGA.

Multichip modules (MCMs)
Mounting individual chip packages on a PCB presents several problems. A chip package is several times the area of the chip taking up space on the board. Circuit resistance is increased by the individual resistances of all the package pins, and the electrical path lengths are multiplied by the number of chips and package leads. Each of these problems is reduced by mounting several chips on the same substrate. The technology is similar to hybrid circuits, but thick film screened components are not, or rarely, used. Three types of MCMs have evolved. MCM-L (laminated) is similar to advanced laminated printed circuit boards, using copper foil conductors on plastic dielectrics. MCM-C (ceramic) are more like hybrid circuits. The substrate is a cofired ceramic with thick film conductors. MCM-D (deposited) uses ceramic, metal, or silicon substrates use deposited thin metal conductors.

0 comments:

Post a Comment