IBM to use water cooling for future 3D IC processors - Advanced Packaging
March 18, 2011 - At the recent CeBIT Fair in Hanover, Germany, IBM CEO Sam Palmisano announced that IBM's 3D technology will likely appear in its Power8 processor, planned for 2013, using 28nm or 22nm process technology.
The first goal, he indicated, is to place the memory directly above or beneath the CPU. The processor will likely employ a linked memory and "a layer of small specialized computing cores adapted for specific intended uses." Future plans envision up to 100,000 connections per mm2 in silicon.
March 18, 2011 - At the recent CeBIT Fair in Hanover, Germany, IBM CEO Sam Palmisano announced that IBM's 3D technology will likely appear in its Power8 processor, planned for 2013, using 28nm or 22nm process technology.
The first goal, he indicated, is to place the memory directly above or beneath the CPU. The processor will likely employ a linked memory and "a layer of small specialized computing cores adapted for specific intended uses." Future plans envision up to 100,000 connections per mm2 in silicon.
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